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Product Descriptions

RK3066 is a low power, high performance processor solution for mobile phones,personal mobile internet device and other digital multimedia applications, and integrates dual-core Cortex-A9 with separately NEON and FPU coprocessor.

Many embedded powerful hardware engines provide optimized performance for highend application. RK3066 supports almost full-format video decoder by 1080p@60fps, also support H.264/MVC/VP8 encoder by 1080p@30fps, high-quality JPEG encoder/ decoder and special image preprocessor and postprocessor.

Embedded 3D GPU makes RK3066 completely compatible with OpenGL ES2.0 and 1.1,OpenVG 1.1. Even support high quality 3D video replay. Special 2D hardware engine with MMU will maximize display performance.

RK3066 has high-performance external memory interface (DDR3/ LVDDR3/LPDDR/ LPDDR2) capable of sustaining demanding memory bandwidths, also provides a complete set of peripheral interface to support very flexible applications.

This document will provide guideline on how to use RK3066 correctly and efficiently.

In them , the chapter 1 and chapter 2 will introduce the features, block diagram, signal descriptions and system usage of RK3066, the chapter 3 through chapter 45 will describe the full function of each module in detail.

Product Features

•  Dual-core ARM Cortex-A9 MPCore processor is a high-performance, low-power, cached application processor

•  Full implementation of the ARM architecture v7-A instruction set, ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation

•  Superscalar, variable length, out-of-order pipeline with dynamic branch prediction, 8- stage pipeline

•  Include VFPv3 hardware to support single and double-precision add, subtract, divide, multiply and accumulate, and square root operations

•  SCU ensures memory coherency between the two CPUs

•  Integrated timer and watchdog timer per CPU

•  Integrated 32KB L1 instruction cache , 32KB L1 data cache, 4-waty set associative

•  512KB unified L2 Cache

•  Trustzone technology support

•  Full coresight debug solution

•  Debug and trace visibility of whole systems

•  ETM trace support

•  Invasive and non-invasive debug

•  Four separate power domain to support Internal power switch on/off and externally turn on/off based on different application scenario

•  PD_A9_0: 1 st Cortex-A9 + Neon + FPU + L1 I/D Cache

•  PD_A9_1: 2nd Cortex-A9 + Neon + FPU + L1 I/D Cache

•  PD_DBG: CoreSight-DK for Cortex-A9

•  PD_SCU: SCU + L2 Cache controller, and including PD_A9_0, PD_A9_1, PD_DGB

•  One isolated voltage domain to support DVFS

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