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Product Descriptions

? The Intel? Pentium? M Processor with 2-MB L2 Cache processor support

? 533-MHz processor system bus support

? Intel? Pentium? M Processor Low Voltage support

? Intel? Pentium? M Processor Ultra Low Voltage support

? 400-MHz processor system bus support

? Source Synchronous Double-pumped (2×) Address

? Source Synchronous Quad-pumped (4×) Data

? Supports front side bus (FSB) interrupt delivery

? Host bus dynamic bus inversion HDVIN (DBI) support

? 32-bit host bus addressing support

? 12-deep in-order queue support

? AGTL+ bus driver technology with integrated termination resistors supported

? DPWR# signal to processor for FSB power management

? BSEL pins for BCLK frequency select

? Enhanced Intel SpeedStep ? technology

? Intel? Celeron ? M 90 nm processor support

? Intel? Celeron ? M 90 nm processor ULV support

? 400-MHz processor system bus support

? Source Synchronous Double-pumped (2×) Address

? Source Synchronous Quad-pumped (4×) Data

? Supports front side bus (FSB) interrupt delivery

? Host bus dynamic bus inversion HDVIN (DBI) support

? 32-bit host bus addressing support

? 12-deep in-order queue support

? AGTL+ bus driver technology with integrated termination resistors supported

? DPWR# signal to processor for FSB power management

? BSEL pins for BCLK frequency select

? System Memory Support

? DDR or DDR2 SDRAM channels (64-bits wide) are supported.

? Supports SO-DIMM’s of the same type (i.e. all DDR or all DDR2), not mixed.

? 256-Mb, 512-Mb and 1-Gb technology supported using x8 or x16 devices.

? Supports High Density memory Package for DDR or DDR2 type devices

? Minimum memory supported is 128 MB

? Maximum memory supported is 2 GB.

? Supports configurations defined in the JEDEC* DDR / DDR2 SO-DIMM specification only

? DDR feature support:

? DDR – 333 MHz memory device

? DDR2 feature support:

? DDR2 - 400 MHz memory devices

? DDR2 - 533 MHz memory devices

? Supports On Die Termination (ODT) for DDR2

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Product Data Manual:

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